VSS Crystal-to-HCSL, 100MHz PCI Express 841S102 Datasheet Clock Synthesizer General Description Features The 841S102 is a PLL-based clock synthesizer specifically designed Two 0.7V current mode differential HCSL output pairs for PCI Express Clock applications. This device generates a Crystal oscillator interface: 25MHz 100MHz differential HCSL clock from an input reference of 25MHz. Output frequency: 100MHz The input reference may be derived from an external source or by RMS phase jitter 100MHz (12kHz 20MHz): 1.23ps (typical) the addition of a 25MHz crystal to the on-chip crystal oscillator. An external reference is applied to the XTAL IN pin with the XTAL OUT Cycle-to-cycle jitter: 20ps (maximum) pin left floating.The device offers spread spectrum clock output for 2 I C support with readback capabilities up to 400kHz 2 reduced EMI applications. An I C bus interface is used to enable or Spread Spectrum for electromagnetic interference (EMI) reduction disable spread spectrum operation as well as select either a down 3.3V operating supply mode spread value of -0.35% or -0.5%.The 841S102 is available in a lead-free package. -40C to 85C ambient operating temperature Lead-free (RoHS 6) package PCI Express Gen 1, 2 and 3 jitter compliant HiPerClockS Block Diagram Pin Assignment 25MHz 2 V SS 1 20 VDD XTAL IN Divider SRCT 1:2 V 2 19 SDATA OSC PLL 2 DD Network SRCC 1:2 SRCT2 3 18 SCLK XTAL OUT nc SRCC2 4 17 SRCT1 5 16 XTAL OUT Pullup SDATA 2 2 SRCC1 6 15 XTAL IN I C Pullup V 7 14 VDD SS SCLK Logic V 8 13 DD V 9 12 VDDA SS IREF IREF 10 11 VSS 841S102 20-Lead TSSOP 4.4mm x 6.5mm x 0.925mm package body G Package Top View 2016 Integrated Device Technology, Inc. 1 Revision B, July 7, 2016841S102 Datasheet Pin Description and Pin Characteristics Tables Table 1. Pin Descriptions Number Name Type Description 1, 7, 9, 11, V Power Power supply ground. SS 13 2, 8, V Power Power supply pins. DD 14, 20 3, 4 SRCT2, SRCC2 Output Differential output pair. HCSL interface levels. 5, 6 SRCT1, SRCC1 Output Differential output pair. HCSL interface levels. An external fixed precision resistor (475 ) from this pin to ground provides a reference current used for differential current-mode SRCCx, SRCTx clock 10 IREF Input outputs. 12 V Power Analog supply for PLL. DDA 15, 16 XTAL IN, XTAL OUT Input Crystal oscillator interface. XTAL IN is the input. XTAL OUT is the output. 17 nc Unused No connect. 2 I C compatible SCLK. This pin has an internal pullup resistor. Open drain. 18 SCLK Input Pullup LVCMOS/LVTTL interface levels. 2 I C compatible SDATA. This pin has an internal pullup resistor. 19 SDATA I/O Pullup LVCMOS/LVTTL interface levels. NOTE: Pullup refers to internal input resistors. See Table 2, Pin Characteristics, for typical values. Table 2. Pin Characteristics Symbol Parameter Test Conditions Minimum Typical Maximum Units Input Capacitance 2pF C IN R Input Pullup Resistor 51 k PULLUP 2016 Integrated Device Technology, Inc. 2 Revision B, July 7, 2016