Product Information

W29N01GVDIAA

W29N01GVDIAA electronic component of Winbond

Datasheet
NAND Flash Serial 3V 1G-bit 128M x 8 25ns
Manufacturer: Winbond
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)

5: USD 1.6409 ea
Line Total: USD 8.2

0 - Global Stock
MOQ: 5  Multiples: 1
Pack Size: 1

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Availability Price Quantity
0 - WHS 1


Ships to you between Wed. 15 May to Tue. 21 May

MOQ : 5
Multiples : 1

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W29N01GVDIAA
Winbond

5 : USD 1.6409

Read More Specifications

     
Manufacturer
Product Category
Interface Type
Organisation
Timing Type
Data Bus Width
Supply Voltage - Min
Supply Voltage - Max
Supply Current - Max
Minimum Operating Temperature
Maximum Operating Temperature
Programmable
Boot Type
Density
Address Bus
Cell Type
Operating Temp Range
Program/Erase Volt Typ
Rad Hardened
Operating Temperature Classification
Access Time Max
Operating Supply Voltage Typ
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Additional Infomation About Product

W29N01GV W29N01GV 1G-BIT 3.3V NAND FLASH MEMORY st Release Date: February 1 , 2016 1 Revision F W29N01GV Table of Contents 1. GENERAL DESCRIPTION ............................................................................................................... 7 2. FEATURES ....................................................................................................................................... 7 3. PACKAGE TYPES AND PIN CONFIGURATIONS .......................................................................... 8 3.1 Pin assignment 48-pin TSOP1 ............................................................................................. 8 3.2 Pin assignment 48 ball VFBGA ............................................................................................ 9 3.3 Pin assignment 63 ball VFBGA .......................................................................................... 10 3.4 Pin Descriptions .................................................................................................................. 11 4. PIN DESCRIPTIONS ...................................................................................................................... 12 4.1 Chip Enable ( CE) .............................................................................................................. 12 4.2 Write Enable ( WE) ............................................................................................................ 12 4.3 Read Enable ( RE) ............................................................................................................ 12 4.4 Address Latch Enable (ALE) .............................................................................................. 12 4.5 Command Latch Enable (CLE) .......................................................................................... 12 4.6 Write Protect ( WP) ............................................................................................................ 12 4.7 Ready/Busy (RY/ BY) ........................................................................................................ 12 4.8 Input and Output (I/Ox) ....................................................................................................... 12 5. BLOCK DIAGRAM .......................................................................................................................... 13 6. MEMORY ARRAY ORGANIZATION .............................................................................................. 14 6.1 Array Organization .............................................................................................................. 14 7. MODE SELECTION TABLE ........................................................................................................... 15 8. COMMAND TABLE......................................................................................................................... 16 9. DEVICE OPERATIONS .................................................................................................................. 17 9.1 READ operation .................................................................................................................. 17 9.1.1 PAGE READ (00h-30h)......................................................................................................... 17 9.1.2 CACHE READ OPERATIONS .............................................................................................. 18 9.1.3 RANDOM DATA OUTPUT (05h-E0h) ................................................................................... 22 9.1.4 READ ID (90h) ...................................................................................................................... 23 9.1.5 READ PARAMETER PAGE (ECh) ....................................................................................... 24 9.1.6 READ STATUS (70h)............................................................................................................ 26 9.1.7 READ UNIQUE ID (EDh) ...................................................................................................... 28 9.2 PROGRAM operation ......................................................................................................... 29 9.2.1 PAGE PROGRAM (80h-10h) ................................................................................................ 29 9.2.2 SERIAL DATA INPUT (80h) .................................................................................................. 29 9.2.3 RANDOM DATA INPUT (85h) .............................................................................................. 30 9.2.4 CACHE PROGRAM (80h-15h) ............................................................................................. 30 9.3 COPY BACK operation....................................................................................................... 32 9.3.1 READ for COPY BACK (00h-35h) ........................................................................................ 32 9.3.2 PROGRAM for COPY BACK (85h-10h) ................................................................................ 32 9.4 BLOCK ERASE operation .................................................................................................. 34 9.4.1 BLOCK ERASE (60h-D0h) .................................................................................................... 34 9.5 RESET operation ................................................................................................................ 35 9.5.1 RESET (FFh) ........................................................................................................................ 35 st Release Date: February 1 , 2016 2 Revision F

HS Compliance

Tariff Desc

8542.32.00 32 No ..CMOS and MOS Read Only Memory and Programmable Read Only Memory whether erasable or non-erasable (for example, flash memory, EPROM, E2PROM, EAPROM, NOVRAM, ROM and PROM)

Winbond may also be referenced as

Winbond Elec
WINBOND ELECTRONICS
WINBOND ELECTRONICS CORP AMERICA

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