CMRDM3575 SURFACE MOUNT www.centralsemi.com N-CHANNEL AND P-CHANNEL DESCRIPTION: ENHANCEMENT-MODE The CENTRAL SEMICONDUCTOR CMRDM3575 COMPLEMENTARY SILICON MOSFETS consists of complementary N-Channel and P-Channel enhancement-mode silicon MOSFETs designed for high speed pulsed amplifier and driver applications. These MOSFETs offer low r and low threshold DS(ON) voltage. MARKING CODE: CT FEATURES: SOT-963 CASE Power dissipation: 125mW Low package profile: 0.5mm (MAX) Device is Halogen Free by design Low r APPLICATIONS: DS(ON) Low threshold voltage Load/Power switches Logic level compatible Power supply converter circuits Small SOT-963 surface mount package Battery powered portable devices MAXIMUM RATINGS: (T =25C) SYMBOL N-CH (Q1) P-CH (Q2) UNITS A Drain-Source Voltage V 20 V DS Gate-Source Voltage V 8.0 V GS Continuous Drain Current (Steady State) I 160 140 mA D Continuous Drain Current, t <5.0s I 200 180 mA p D Power Dissipation P 125 mW D Operating and Storage Junction Temperature T , T -65 to +150 C J stg Thermal Resistance 1000 C/W JA ELECTRICAL CHARACTERISTICS: (T =25C) N-CH (Q1) P-CH (Q2) A SYMBOL TEST CONDITIONS MIN TYP MAX MIN TYP MAX UNITS I , I V =5.0V, V =0 - - 100 - - 100 nA GSSF GSSR GS DS I V =5.0V, V =0 - - 50 - - 50 nA DSS DS GS I V =16V, V =0 - - 100 - - 100 nA DSS DS GS BV V =0, I=250A 20 - - 20 - - V DSS GS D V V =V I=250A 0.4 - 1.0 0.4 - 1.0 V GS(th) DS GS, D r V =4.5V, I=100mA - 1.5 3.0 - 4.0 5.0 DS(ON) GS D r V =2.5V, I=50mA - 2.0 4.0 - 5.5 7.0 DS(ON) GS D r V =1.8V, I=20mA - 3.0 6.0 - 8.0 10 DS(ON) GS D r V =1.5V, I=10mA - 4.0 10 - 11 17 DS(ON) GS D r V =1.2V, I=1.0mA - 7.0 - - 20 - DS(ON) GS D g V =5.0V, I=125mA - 1.3 - - 0.14 - S FS DS D C V =15V, V =0, f=1.0MHz - 2.2 - - 4.0 - pF rss DS GS C V =15V, V =0, f=1.0MHz - 9.0 - - 10 - pF iss DS GS C V =15V, V =0, f=1.0MHz - 3.0 - - 3.7 - pF oss DS GS Q V =10V, V =4.5V, I=100mA - 0.458 - - 0.50 - nC g(tot) DS GS D Q V =10V, V =4.5V, I=100mA - 0.176 - - 0.17 - nC gs DS GS D Q V =10V, V =4.5V, I=100mA - 0.138 - - 0.11 - nC gd DS GS D t V =10V, V =4.5V, I=200mA - 25 - - 35 - ns on DD GS D t V =10V, V =4.5V, I=200mA - 85 - - 100 - ns off DD GS D R3 (12-December 2012)CMRDM3575 SURFACE MOUNT N-CHANNEL AND P-CHANNEL ENHANCEMENT-MODE COMPLEMENTARY SILICON MOSFETS SOT-963 CASE - MECHANICAL OUTLINE PIN CONFIGURATION LEAD CODE: 1) Source Q1 2) Gate Q1 3) Drain Q2 4) Source Q2 5) Gate Q2 6) Drain Q1 MARKING CODE: CT R3 (12-December 2012) www.centralsemi.com