STD840DN40 STMicroelectronics

STD840DN40 Dual NPN high voltage transistors in a single package Datasheet production data Features Low V CE(sat) Simplified circuit design Reduced component count 8 Fast switching speed 4 1 Applications Compact fluorescent lamp (CFL) 220 V mains DIP-8 Electronic ballast for fluorescent lighting Description Figure 1. Internal schematic diagram This device is a dual NPN high voltage power transistor manufactured using multi-epitaxial planar technology. It is housed in a dual-island DIP-8 package, with separated terminals for a high degree of mounting flexibility. Table 1. Device summary Order code Marking Package Packaging STD840DN40 D840DN40 DIP-8 Tube October 2012 Doc ID 16796 Rev 3 1/9 This is information on a product in full production. www.st.com 9Electrical ratings STD840DN40 1 Electrical ratings Table 2. Absolute maximum ratings Symbol Parameter Value Unit V Collector-base voltage (I = 0) 700 V CBO E V Collector-emitter voltage (I = 0) 400 V CEO B V Emitter-base voltage (I = 0, I = 1.5 A, t < 10 ms) V V EBO C B p (BR)EBO I Collector current 4 A C I Collector peak current (t < 5 ms) 8 A CM P I Base current 1.5 A B I Base peak current (t < 5 ms) 3 A BM P Total dissipation at T = 25 C single transistor 3 W amb P TOT Total dissipation at T = 25 C single transistor 45 W case T Storage temperature -65 to 150 C STG T Max. operating junction temperature 150 C J Table 3. Thermal data Symbol Parameter Value Unit (1) R Thermal resistance junction-ambient (single transistor) 42 C/W thJA R Thermal resistance junction-case (single transistor) 2.7 C/W thJC 1. Device mounted on PCB area of 25 mm. 2/9 Doc ID 16796 Rev 3